GATE | GATE CS 1999 | Question 66 Last Updated : 10 Oct, 2017 Improve Improve Like Article Like Save Share Report [5 Marks question] Design a 2K x 8 (2048 locations, each 8 bit wide) memory system mapped at addresses (1000)16 to (17FF)16 for the 8085 processor using four 1K x 4 memory chips. Each of these chips has the following signal pins: Answer: Explanation: Quiz of this Question Like Article Suggest improvement Previous GATE | GATE CS 1999 | Question 64 Next GATE | GATE CS 1999 | Question 67 Share your thoughts in the comments Add Your Comment Please Login to comment...